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| Pin | Signal name | Description (G4) | Description (first G4) |
|---|---|---|---|
| 1 | RED | Red video signal | Red video signal |
| 2 | GREEN | Green video signal | Green video signal |
| 3 | BLUE | Blue video signal | Blue video signal |
| 4 | n.c. | No connect | Monitor ID signal 0 |
| 5 | GND | Ground | DDC return |
| 6 | RED_RTN | Red video signal return | Analog video ground |
| 7 | GREEN_RTN | Green video signal return | Analog video ground |
| 8 | BLUE_RTN | Blue video signal return | Analog video ground |
| 9 | n.c. | No connect | 5 V power for I/O device |
| 10 | GND | Ground | HSYNC and VSYNC ground |
| 11 | n.c. | No connect | VGA ID signal |
| 12 | SDA | I2C data | Monitor ID signal 2 |
| 13 | HSYNC | Horizontal synchronization signal | Horizontal synchronization signal |
| 14 | VSYNC | Vertical synchronization signal | Vertical synchronization signal |
| 15 | SCL | I2C clock | Monitor ID signal 1 |
The graphics card has an Apple proprietary connector called the ADC (Apple display connector). It carries both digital and analog video signals as well as USB and control signals and power for an external monitor.
| Pin | Signal name | Pin | Signal name |
| 1 | 25-V Supply | 16 | TMDS Data1/3 Shield |
| 2 | 25-V Supply | 17 | TMDS Data3Ð |
| 3 | LED | 18 | TMDS Data3+ |
| 4 | TMDS Data0Ð | 19 | DDC CLock |
| 5 | TMDS Data0+ | 20 | Clock Return |
| 6 | TMDS Data0/5 Shield | 21 | USB Data+ |
| 7 | TMDS Data5Ð | 22 | USB DataÐ |
| 8 | TMDS Data5+ | 23 | USB Return |
| 9 | DDC Data | 24 | TMDS Data2Ð |
| 10 | Vsync | 25 | TMDS Data2+ |
| 11 | 25-V Return | 26 | TMDS Data2/4 Shield |
| 12 | 25-V Return | 27 | TMDS Data4Ð |
| 13 | Soft Power | 28 | TMDS Data4+ |
| 14 | TMDS Data1Ð | 29 | Clock+ |
| 15 | TMDS Data1+ | 30 | ClockÐ |
The connector for the digital video monitor is a standard digital-only
DVI connector.
The graphics data sent to the digital monitor use transition minimized
differential signaling (TMDS). TMDS uses an encoding algorithm
to
convert bytes of graphics data into characters that are transition-minimized
to reduce EMI with copper cables and DC-balanced for
transmission over fiber optic cables. The TMDS algorithm also
provides robust clock recovery for greater skew tolerance with
longer
cables or low cost short cables.
For information about TMDS, see the specification, Digital
Visual Interface DVI Revision 1.0, available on the web site of
the Digital
Display Working Group (DDWG) at
http://www.ddwg.org/index.html
|
Pin |
Signal name |
Pin |
Signal name |
|---|---|---|---|
| 1 | TMDS Data2- | 13 | TMDS Data3+ |
| 2 | TMDS Data2+ | 14 | +5V Power |
| 3 | TMDS Data2/4 Shield | 15 | Ground for +5V Power |
| 4 | TMDS Data4 | 16 | Hot Plug Detect |
| 5 | TMDS Data4+ | 17 | TMDS Data0- |
| 6 | DDC Clock | 18 | TMDS Data0+ |
| 7 | DDC Data | 19 | TMDS Data0/5 Shield |
| 8 | n. c. | 20 | TMDS Data5- |
| 9 | TMDS Data1- | 21 | TMDS Data5+ |
| 10 | TMDS Data1+ | 22 | TMDS Clock Shield |
| 11 | TMDS Data1/3 Shield | 23 | TMDS Clock+ |
| 12 | TMDS Data3- | 24 | TMDS Clock- |